Maxim-integrated MAXQ Family Users Guide: MAXQ2000 Supplement Instrukcja Użytkownika Strona 46

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MAXQ Family Users Guide:
MAXQ2000 Supplement
Register Name: PD4
Register Description: Port 4 Direction Register
Register Address: M1[10h]
Bits 0 to 4: (PD4.0 to PD4.4) Port Direction Bits for P4.0 to P4.4. Each these bits controls the input/output direction of its corre-
sponding port pin as follows.
0 = The port pin is in input mode, either with a weak pullup (if PO = 1) or tri-stated (if PO = 0).
1 = The port pin is in output mode, with the output level to drive given by PO.
Bits 5 to 7: (PD4.5 to PD4.7) Reserved
Register Name: PD5
Register Description: Port 5 Direction Register
Register Address: M1[11h]
Bits 0 to 7: (PD5.0 to PD5.7) Port Direction Bits for P5.0 to P5.7. Each these bits controls the input/output direction of its corre-
sponding port pin as follows.
0 = The port pin is in input mode, either with a weak pullup (if PO = 1) or tri-stated (if PO = 0).
1 = The port pin is in output mode, with the output level to drive given by PO.
Register Name: PD6
Register Description: Port 6 Direction Register
Register Address: M1[12h]
Bits 0 to 7: (PD6.0 to PD6.7) Port Direction Bits for P6.0 to P6.7. Each these bits controls the input/output direction of its corre-
sponding port pin as follows.
0 = The port pin is in input mode, either with a weak pullup (if PO = 1) or tri-stated (if PO = 0).
1 = The port pin is in output mode, with the output level to drive given by PO.
Bit # 76543210
Name PD4.4 PD4.3 PD4.2 PD4.1 PD4.0
Reset 0 0 0 00000
Access r r r r/w r/w r/w r/w r/w
Bit # 76543210
Name PD5.7 PD5.6 PD5.5 PD5.4 PD5.3 PD5.2 PD5.1 PD5.0
Reset 0 0 0 00000
Access r/w r/w r/w r/w r/w r/w r/w r/w
Bit # 76543210
Name PD6.7 PD6.6 PD6.5 PD6.4 PD6.3 PD6.2 PD6.1 PD6.0
Reset 0 0 0 00000
Access r/w r/w r/w r/w r/w r/w r/w r/w
Maxim Integrated
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