The following peripheral registers control the general-purpose I/O and external interrupt features specific to the MAXQ2000.
Register Name: PO0
Register Description: Port 0 Output Register
Register Address: M0[00h]
Bits 0 to 7: (PO0.0 to PO0.7) Port 0 Output. This register stores the data that will be output on any of the pins of Port 0 that have been
defined as output pins. If the port pins are in input mode, this register controls the weak pullup for each pin. Changing the data direc-
tion of any pins for this port (through register PD0) will not affect the value in this register.
Register Name: PO1
Register Description: Port 1 Output Register
Register Address: M0[01h]
Bits 0 to 7: (PO1.0 to PO1.7) Port 1 Output. This register stores the data that will be output on any of the pins of Port 1 that have been
defined as output pins. If the port pins are in input mode, this register controls the weak pullup for each pin. Changing the data direc-
tion of any pins for this port (through register PD1) will not affect the value in this register.
Register Name: PO2
Register Description: Port 2 Output Register
Register Address: M0[02h]
Bits 0 to 7: (PO2.0 to PO2.7) Port 2 Output. This register stores the data that will be output on any of the pins of Port 2 that have been
defined as output pins. If the port pins are in input mode, this register controls the weak pullup for each pin. Changing the data direc-
tion of any pins for this port (through register PD2) will not affect the value in this register.
MAXQ Family User’s Guide:
MAXQ2000 Supplement
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