
MAXQ Family User’s Guide:
MAXQ8913 Supplement
5-3
Table 5-2. Peripheral Register Bit Functions (continued)
Table 5-3. Peripheral Register Bit Reset Values
REG
BIT
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
MC0R MC0R (16 bits)
TBV TBV (16 bits)
TBC TBC (16 bits)
ADST — — — — ADDAT (4 bits) REFOK
ADC
ONV
ADDAI
ADC
FG
ADIDX (4 bits)
ADADDR — — — — SEQSTORE (4 bits) — SEQSTART (3 bits) — SEQEND (3 bits)
DAC1OUT — — — — — — DAC1OUT (10 bits)
DAC2OUT — — — — — — DAC2OUT (10 bits)
DAC3OUT DAC3OUT (8 bits)
DAC4OUT DAC4OUT (8 bits)
AMPCN —
AMP
FLT
AMPIF AMPIE
AMP
CK1
AMP
CK0
AMP
EN1
AMP
EN0
ISINKCN ISINK2 (8 bits) ISINK1 (8 bits)
ADCN — — — —
ADINT
1
ADINT
0
ADCLK
1
ADCLK
0
IREF
EN
AD
CONT
AD
DAIE
AD
PMO
ADACQ (4 bits)
ADDATA ADDATA (16 bits)
OPMCN — — — —
OPM
END
OPM
ENC
OPM
ENB
OPM
ENA
DACEN — —
DAC
OUT2
DAC
OUT1
DAC
EN4
DAC
EN3
DAC
EN2
DAC
EN1
TEMPEN — — — — — — — TSEN
REG
BIT
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
PO0 1 1 1 1 1 1 1 1
PO1 0 0 0 1 1 1 1 1
EIF0 0 0 0 0 0 0 0 0
EIE0 0 0 0 0 0 0 0 0
EIF1 0 0 0 0 0 0 0 0
EIE1 0 0 0 0 0 0 0 0
SVM 0 0 0 0 0 1 1 1 0 0 0 0 0 0 0 0
PI0 s s s s s s s s
PI1 0 0 0 s s s s s
EIES0 0 0 0 0 0 0 0 0
EIES1 0 0 0 0 0 0 0 0
PWCN 0 0 0 0 0 0 0 0
0 0 0 0 s s 0 0
PID0 0 0 0 0 0 0 0 0
PD0 0 0 0 0 0 0 0 0
PD1 0 0 0 0 0 0 0 0
SCON 0 0 0 0 0 0 0 0
SBUF 0 0 0 0 0 0 0 0
SPICN 0 0 0 0 0 0 0 0
Maxim Integrated
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