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Maxim-integrated High-Speed Microcontroller podręczniki

Instrukcje obsługi i podręczniki użytkownika dla Sprzęt komputerowy Maxim-integrated High-Speed Microcontroller.
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Maxim integrated High-Speed Microcontroller Instrukcja Użytkownika (176 strony)


Marka: Maxim-integrated | Kategoria: Sprzęt komputerowy | Rozmiar: 3.58 MB |

 

Spis treści

TABLE OF CONTENTS

2

LIST OF FIGURES

7

LIST OF TABLES

8

1. INTRODUCTION

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2. ORDERING INFORMATION

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3. ARCHITECTURE

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3.1 ALU

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Rev: 062210 12 of 176

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3.2.16 Interrupts

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3.2.17 Timing Control

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3.2.18 Real-Time Clock

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3.2.19 Feature Summary

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4. PROGRAMMING MODEL

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4.1 Memory Organization

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Rev: 062210 15 of 176

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Figure 4-2. Register Map

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Rev: 062210 17 of 176

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Rev: 062210 18 of 176

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Rev: 062210 19 of 176

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Rev: 062210 20 of 176

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Rev: 062210 21 of 176

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Rev: 062210 22 of 176

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Rev: 062210 23 of 176

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Rev: 062210 24 of 176

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4.2.1 Port 0 (P0)

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4.2.2 Stack Pointer (SP)

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Rev: 062210 26 of 176

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4.2.8 Power Control (PCON)

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INT1 pin

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INT0 is level triggered

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Rev: 062210 29 of 176

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4.2.11 Timer 0 LSB (TL0)

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4.2.12 Timer 1 LSB (TL1)

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4.2.13 Timer 0 MSB (TH0)

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4.2.14 Timer 1 MSB (TH1)

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Rev: 062210 31 of 176

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4.2.16 Port 1 (P1)

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RG bit

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Rev: 062210 34 of 176

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4.2.21 Port 2 (P2)

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7 6 5 4 3 2 1 0

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4.2.25 Port 3 (P3)

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Rev: 062210 41 of 176

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RMS2, RMS1

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DME1, DME0

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LB3, LB2, LB1

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Rev: 062210 45 of 176

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CP/RL2 EXEN2 DCEN RESULT

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4.2.36 Timer 2 Mode (T2MOD)

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4.2.39 Timer 2 LSB (TL2)

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4.2.40 Timer 2 MSB (TH2)

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Rev: 062210 49 of 176

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Rev: 062210 51 of 176

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4.2.45 B Register (B)

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Rev: 062210 53 of 176

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Rev: 062210 54 of 176

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Rev: 062210 55 of 176

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Rev: 062210 56 of 176

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Rev: 062210 57 of 176

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4.3 Instruction Timing

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4.4 Addressing Modes

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4.4.2 Direct Addressing

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4.4.4 Immediate Addressing

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4.4.6 Relative Addressing

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4.4.7 Page Addressing

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4.5 Program Status Flags

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Rev: 062210 63 of 176

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5.6 Instruction Timing

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Rev: 062210 65 of 176

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Memory Access

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Rev: 062210 67 of 176

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22h

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Rev: 062210 69 of 176

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Rev: 062210 70 of 176

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5.7 Comparison to the 8051

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Rev: 062210 72 of 176

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Rev: 062210 73 of 176

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Rev: 062210 74 of 176

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Rev: 062210 75 of 176

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6. MEMORY ACCESS

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6.1 Internal Program Memory

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6.2 Internal Data Memory

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6.2.1 ROMSIZE Feature

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RMS2 RMS1 RMS0

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MAX ON-CHIP ROM

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Rev: 062210 79 of 176

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Rev: 062210 80 of 176

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6.5 Data Memory Access

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Rev: 062210 82 of 176

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Rev: 062210 83 of 176

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6.6 Data Memory Timing

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CKCON.2–0

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Rev: 062210 86 of 176

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C1 C2 C3 C4

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7. POWER MANAGEMENT

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Precision Voltage Monitor

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7.1.2 Power-Fail Reset

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7.1.3 Power-On Reset

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7.1.4 Bandgap Select

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Rev: 062210 90 of 176

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7.1.5 Watchdog Wake-Up

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Rev: 062210 92 of 176

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7.2 Power Conservation

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Rev: 062210 94 of 176

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7.3 Power Management Modes

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Rev: 062210 96 of 176

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Rev: 062210 97 of 176

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7.3.3 Switchback

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Rev: 062210 99 of 176

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Rev: 062210 100 of 176

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RG bit. The procedure to

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8. RESET CONDITIONS

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8.1 Reset Sources

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8.2 Reset State

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8.3 No-Battery Reset

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8.4 In-System Disable Mode

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9.1 Interrupt Overview

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9. INTERRUPTS

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9.2 Interrupt Sources

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9.2.2 Timer Interrupts

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9.2.4 Real-Time Clock

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9.2.5 Power-Fail Interrupt

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9.3 Simulated Interrupts

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9.4 Interrupt Priorities

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9.6 Interrupt Latency

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Rev: 062210 110 of 176

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Rev: 062210 111 of 176

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10. PARALLEL I/O

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10.1 Port 0

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10.2 Port 2

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10.3 Ports 1 and 3

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10.4 Output Functions

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10.6 Input Functions

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10.9 I/O Port Timing

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10.10 Optional Functions

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11. PROGRAMMABLE TIMERS

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11.1 16-Bit Timers

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INT1 and TR1 =

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11.2 Mode 0

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11.3 Mode 1

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11.4 Mode 2

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11.5 Mode 3

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11.6 Timer 2

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Rev: 062210 125 of 176

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11.7 Timer 2 Modes

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T2 = 1. As

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TIMER 2

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INTERRUPT

128

T2CON.7

128

11.7.5 Baud-Rate Generator

129

RL2 = 0

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11.8 Time Base Selection

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11.9 Watchdog Timer

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Rev: 062210 133 of 176

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Rev: 062210 134 of 176

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Rev: 062210 135 of 176

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12. SERIAL I/O

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12.1 Serial Mode Summary

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12.1.3 Mode 2

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12.1.4 Mode 3

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Rev: 062210 138 of 176

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Rev: 062210 139 of 176

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12.3 Baud Rates

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12.3.2 Mode 2

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12.3.3 Mode 1 or 3

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12.4 Serial I/O Description

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12.4.2 Mode 1

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Rev: 062210 146 of 176

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RECEIVE TIMING

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TRANSMIT TIMING

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12.4.3 Mode 2

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REGISTER

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12.4.4 Mode 3

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Rev: 062210 150 of 176

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SADDR 11110000

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Rev: 062210 152 of 176

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13. TIMED-ACCESS PROTECTION

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13.1 Protected Bits

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13.2 Protection Scheme

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TABLE_READ:

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14. REAL-TIME CLOCK

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14.3 Using the RTC Alarm

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TRMx bits must be

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15. BATTERY BACKUP

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15.1 Selecting a Battery

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REGISTER NAME LOCATION

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16. INSTRUCTION SET DETAILS

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MNEMONIC

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171 of 176

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17. TROUBLESHOOTING

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18.1 Technical Support

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18.2 Development Tools

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18.3 Software Compatibility

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Rev: 062210 175 of 176

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2010 Maxim Integrated

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