Maxim-integrated 78M6610+PSU Hardware Design Guidelines Instrukcja Użytkownika Pobierz pdf (Strona 16)

78M6610+PSU Hardware Design Guidelines AN_6610_107

16 Rev 0

5.3 LINE Voltage Resistor Network

The LINE voltage resistor network can be split between a 78M6610+PSU (daughter) board and the host

board. The 750 Ω termination resistor and anti-aliasing capacitors should be placed near the

78M6610+PSU’s analog input pin.

Figure 11: LINE Voltage Filter Network

The high voltage 1 MΩ resistors can be placed remotely on the host board.

Figure 12: High Voltage Resistors

Termination

Resistor

High Voltage

1MΩ Resistors

78M6610+PSU

Anti-Aliasing

Capacitors

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