Maxim-integrated 78M6610+PSU Hardware Design Guidelines Instrukcja Użytkownika Pobierz pdf (Strona 15)

AN_6610_107 78M6610+PSU Hardware Design Guidelines

Rev. 0 15

5.2 Crystal Oscillator Components

The 78M6610+PSU Evaluation Board has the crystal and its two load capacitors located on the bottom

layer. Place a GND trace between the two terminals of the crystal to minimize oscillator startup problems.

Figure 10: Crystal Y1 and Capacitors C8/ C11

The 78M6610+PSU can operate without an external crystal. Attach the XOUT pin to GND when the

external crystal is not used.

Crystal

GND Via

GND

Isolator

GND Via

1 2 ... 10 11 12 13 14 15 16 17 18 19

Brak uwag

Maxim-integrated 78M6610+PSU Hardware Design Guidelines Instrukcja Użytkownika Strona 15