
71M6533-DB Demo Board User’s Manual
Page: 46 of 75 ` REV 3
2.3 POWER SAVING MEASURES
In many cases, especially when operating the 71M6533 from a battery, it is desirable to reduce the power
consumed by the chip to a minimum. This can be achieved with the measures listed in Table 2-1.
Disable clock test output CKTEST
Select DGND for the multiplexer input
Disable reference voltage output
Reduce the clock for the MPU
Table 2-1: Power Saving Measures
2.4 SCHEMATIC INFORMATION
In this section, hints on proper schematic design are provided that will help designing circuits that are functional
and sufficiently immune to EMI (electromagnetic interference).
2.4.1 COMPONENTS FOR THE V1 PIN
The V1 pin of the 71M6533 can never be left unconnected.
A voltage divider should be used to establish that V1 is in a safe range when the meter is in mission mode (V1
must be lower than 2.9V in all cases in order to keep the hardware watchdog timer enabled). For proper
debugging or loading code into the 71M6533 mounted on a PCB, it is necessary to have a provision like the
header JP1 shown above R1 in Figure 2-7. A shorting jumper on this header pulls V1 up to V3P3 disabling the
hardware watchdog timer.
Figure 2-7: Voltage Divider for V1
On the 71M6533-DB Demo Board this feature is implemented with resistors R83/R86, capacitor C31 and TP10.
See the board schematics in the Appendix for details.
2.4.2 RESET CIRCUIT
Even though a functional meter will not necessarily need a reset switch, the 71M6533-DB Demo Boards provide
a reset pushbutton that can be used when prototyping and debugging software (see Figure 2-8).. For a
production meter, the RESET pin should be pulled down hard to GNDD.
V3P3
R
2
V1
R
1
R
3
5kΩ
C
1
100pF
GND
V3P3
R
2
V1
R
1
R
3
5kΩ
C
1
100pF
GND
Komentarze do niniejszej Instrukcji