Maxim-integrated DS4830A Optical Microcontroller Instrukcja Użytkownika Strona 160

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DS4830A User’s Guide
160
20.1 TAP Controller
The TAP controller is a synchronous state machine that responds to changes at the TMS and TCK signals. Based on
its state transition, the controller provides the clock and control sequence for TAP operation. The performance of the
TAP is dependent on the TCK clock frequency. The maximum TCK clock frequency should be limited to 1/8 the
system clock frequency. This section provides a brief description of the state machine and its state transitions. The
state diagram in Figure 20-1 summarizes the transitions caused by the TMS signal sampling on the rising edge at
TCK. The TMS signal value is presented adjacent to each state transition in the figure.
TEST-LOGIC-RESET
RUN-TEST
-IDLE
SELECT-DR-SCAN
EXIT2-DR
CAPTURE-DR
SHIFT-DR
EXIT1-DR
P
AUSE-DR
UPDATE-DR
SELECT
-IR-SCAN
EXIT2-IR
CAPTURE-IR
SHIFT
-IR
EXIT1-IR
PAUSE-IR
UPDATE-IR
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
Figure 20-2: TAP Controller State Diagram
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